Photolithography is used in the manufacture of semiconductor devices. With photolithography, a pattern within a mask (or reticle in a step-and-repeat projection system) is replicated in a layer of photoresist that has been applied on top of a substrate by first exposing the photoresist layer to actinic radiation through the mask therewith forming a pattern related latent image within the layer of photoresist. The term actinic relates to the property of radiant energy by which photochemical modifications are produced. Subsequently, the latent image is fixed to become a (permanently registered) image within the exposed layer of photoresist. Usually this is achieved through a heating step called a post exposure bake (PEB). After fixation, the image is developed to create a relief layer of the image pattern. In this development step, the photoresist layer is removed, which have been modified during the predevelopment part of the photolithography process to an extent beyond the development threshold. The relief pattern may serve as a mask in further semiconductor process steps such as doping or etching.
In photolithography, exposure resolution is an important parameter. A phase shifting mask (PSM) provides improved exposure resolution, without adding complexity to the mask design and manufacture. It is common to use so called attenuated PSM (attPSM) for replication of contact holes or vias in semiconductor manufacturing.
The improved resolution of the PSM originates from its areas of different transparency, which create phase differences in the transmitted light leading to diffraction. The diffraction phenomenon results in sharper contrast for the main feature of the pattern to replicate. However, it is the same diffraction phenomenon that generates unwanted intensity of light at positions other than those necessary for replicating the main features of a pattern in an attPSM. These unwanted intensities are called side-lobes and they contaminate the final relief mask pattern with unwanted side-lobe features.
In U.S. Pat. No. 6,465,160 B1 a method is disclosed to mitigate the generation of side-lobes in a photolithography process. In this method the parameters of the photolithography process are adjusted in order to increase the contrast of the photoresist pattern. The parameters particularly include the time and temperature of the soft-bake, performed before exposure, and/or of the post exposure bake (PEB).
However, when using PSM or attPSM for replicating dense arrays of contact holes, side-lobes originating from the main features, being the neighboring contact holes, overlap. As a consequence, the side-lobe problem is worsened to such an extent that the method disclosed in U.S. Pat. No. 6,465,160 B1 does not suffice to prevent the problem.